Imran Ahmad

Software Engineer

Hyderabad, Telangana, India15 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 13 years of experience in ASIC and SoC verification.
  • Expertise in OVM/UVM using System Verilog.
  • Proven track record in functional verification projects.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in ASIC and SoC design.

Contact

LinkedIn

Skills

Other Skills

Perl AutomationRTL codingOpen Verification MethodologyStatic Timing AnalysisSystemVerilogVLSIRTL designFunctional VerificationLogic DesignVerilogASICNCSimPrimetimeTCLLogic Synthesis

About

13 years of experience in Design and Verification comprising ASIC verification in OVM/UVM using System Verilog and SoC verification in C/UVM.

Experience

15 yrs
Total Experience
1 yr 10 mos
Average Tenure
1 yr 11 mos
Current Experience

Amd

Senior Member of Technical Staff

Jun 2024 – Present · 1 yr 11 mos · Hyderabad, Telangana, India · On-site

Qualcomm

2 roles

Senior Staff Engineer/Manager

Promoted

Dec 2023 – May 2024 · 5 mos · Hyderabad, Telangana, India

Staff Engineer

Jun 2019 – Nov 2023 · 4 yrs 5 mos · Hyderabad, Telangana, India

  • Design verification of Camera subsystem

Artech information systems

Verification Engineer

Nov 2017 – May 2019 · 1 yr 6 mos · San Diego County, California, United States · On-site

  • client: Qualcomm
  • Design verification of the cortex A5 based camera subsystem.

Eximius design

Verification Lead

Jun 2016 – Oct 2017 · 1 yr 4 mos · Greater Bengaluru Area

  • Functional verification of Coretex M0+ based subsystem.

Cadence design systems

Lead Solutions Engineer

Nov 2014 – May 2016 · 1 yr 6 mos · Bengaluru, Karnataka, India

  • Functional verification of NIC/CCI using UVM and performance measurement.
  • SoC verification solutions in C using Perspec™ tool.

Mirafra technologies

Senior Verification Engineer

Jun 2014 – Oct 2014 · 4 mos · Bengaluru, Karnataka, India

  • Functional logic verification in OVM/UVM using SV.

Silicon image

2 roles

Senior Engineer

Apr 2013 – May 2014 · 1 yr 1 mo · Greater Hyderabad Area

  • Functional logic verification of HDMI/MHL ASIC in OVM/UVM using SV.

Engineer II

Jan 2012 – Mar 2013 · 1 yr 2 mos · Greater Hyderabad Area

  • Functional logic verification of HDMI/MHL ASIC in OVM/UVM using SV.

Soctronics

2 roles

Logic Design Engineer

Jul 2011 – Dec 2011 · 5 mos · Greater Hyderabad Area

  • Functional logic verification of HDMI/MHL ASIC in OVM using SV.

Project Trainee

Jul 2010 – Jun 2011 · 11 mos · Greater Hyderabad Area

  • Functional logic verification of HDMI/MHL ASIC in OVM using SV.

Education

VEDA IIT, JNTUH

Master of Science (M.S.) — VLSI

Jan 2009 – Jan 2011

Koneru Lakshmaiah College of Engineering

Bachelor's degree — Electronics and communications Engineering

Jan 2004 – Jan 2008

Nalanda College of Arts and Science -Vijayawada

XII — M.P.C

Jan 2002 – Jan 2004

Children’s Montessori High School

x-std

Jan 1992 – Jan 2002

Stackforce found 100+ more professionals with Perl Automation & RTL coding

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