Mani Bharath Alapati — Product Engineer
Stackforce AI infers this person is a Semiconductor Verification Specialist with expertise in RISC-V architecture.
Location: Hyderabad, Telangana, India
Experience: 14 yrs 3 mos
Skills
- Risc-v
- Verification
Career Highlights
- Expert in RISC-V CPU verification and architecture.
- Proven leadership in ASIC digital design projects.
- Strong background in functional verification methodologies.
Work Experience
Synopsys Inc
ASIC Digital Design, Principal Engineer (1 mo)
ASIC Digital Design, Sr Staff Engineer (2 yrs 2 mos)
ASIC Digital Design Engineer, Staff (2 yrs 4 mos)
ASIC Digital Design Engineer, SR II (2 yrs 6 mos)
Qualcomm
Sr Lead Engineer (4 mos)
Senior Engineer (1 yr 9 mos)
Soctronics
Senior Engineer (10 mos)
Logic Design Engineer (2 yrs 2 mos)
Engineer Trainee (2 yrs 1 mo)
Education
Master of Technology - MTech at Birla Institute of Technology and Science, Pilani
Bachelor of Technology (B.Tech.) at Institutions Of Engineers, India
Spl. Diploma at Government Institute Of Electronics
SSC at Sri Vignan Public School , Piduguralla