Danish Azmi

Software Engineer

Greater Delhi, India9 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expertise in PCIe and AXI protocols.
  • Strong background in Functional and Formal Verification.
  • Proficient in multiple programming and scripting languages.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC and SoC design.

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Skills

Core Skills

Functional VerificationSystemverilogAsic Design

Other Skills

Universal Verification Methodology (UVM)PerspecPCIeSystem on a Chip (SoC)Formal VerificationApplication-Specific Integrated Circuits (ASIC)RTL VerificationC (Programming Language)Perl AutomationTCLDebuggingAssertion Based VerificationVHDLVerilogFPGA

About

Skill Set- 1. Programming Languages : Verilog, SystemVerilog, VHDL, C, C++, Assembly Language, VBA 2. Verification Methodology : Post Silicon Validation, Advanced Linting, UVM, Direct Testing using Verilog, Synthesis, CDC, Assertion based verification, Formal Verification 3. Scripting Languages : BASH, CSH, TCL,PERL. 4. Communication Protocols : CAN, SPI, I2C, UART, AMBA Protocols ( AHB, AXI-3, AXI-4, AXI-Lite, APB) 5. Operating Systems : Windows 7, Windows 10, Linux (Red Hat Enterprices Distros). 6. EDA Tools : VCS (Synopsys), SpyGlass (Synopsys), Perspec (Cadence), Xilinx ISE Design Suite, QuestaSim 10.0b, LiberoSoC 11.8 (MicroSemi), DVE (Synopsys). 7. Other Tools : Arduino IDE, MATLAB (DIP Tool), C-Free, PADRE (PERL IDE), Cygwin, Codeblock. 8. Database : MS Visio, MS Office Word, MS Office Excel, MS Office Power-point, MS Office Outlook, GVIM Editor. My GITHUB Profile: https://github.com/Danishazmi29

Experience

9 yrs 9 mos
Total Experience
1 yr 11 mos
Average Tenure
3 yrs 6 mos
Current Experience

Synopsys inc

Staff Engineer

Nov 2022Present · 3 yrs 6 mos · Noida, Uttar Pradesh, India · On-site

Universal Verification Methodology (UVM)SystemVerilogFunctional Verification

Qualcomm

Senior Design Verification Engineer

Jun 2021Nov 2022 · 1 yr 5 mos · Noida, Uttar Pradesh, India · On-site

PerspecFunctional Verification

Incise infotech private limited

Design Verification Engineer

Sep 2019May 2021 · 1 yr 8 mos · Noida Area, India · On-site

  • Worked with Client Qualcomm as SoC design verification and formal verification engineer.

Hcl technologies

ASIC Design and Verification Engineer

Jul 2017Sep 2019 · 2 yrs 2 mos · Noida, Uttar Pradesh, India · On-site

  • Worked on test patterns development of L2-Cache IP and CAN interface IP for RZ/A2M microcomputer.

Quantum page pvt ltd

Technical Editor

Sep 2013Sep 2014 · 1 yr · Sahibabad

  • Solving Engineer Question Papers, Writing content for keys, etc.

Education

C - DAC, NOIDA

Master of Technology (M.Tech.) — VLSI Design

Jan 2015Jan 2017

Motivational Pathway

Bachelor of Technology (B.Tech.)

Jan 2009Jan 2013

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