Ankit Tripathi — Software Engineer
Working as SoC Physical Design Engineer at Intel Technologies. Have experience working on huge graphics designs with more than 100 million gate count and frequency in excess of 3 GHz. Specialization in PnR flows and design closure for the multi instance partitions on 5nm/7nm/10nm nodes with 5 million gate count and frequency in excess of 3 GHz. Experienced in EM/IR analysis and feedback for the design using Ansys Redhawk. Experienced in repeater planning(re-timing flops), STA and cross-clock paths constraining for complete section. Experienced in post silicon feedback implementation. Regularly working with RTL unit owners in feedback loop to overcome design challenges.
Stackforce AI infers this person is a Semiconductor Physical Design Engineer with expertise in high-performance SoC design.
Location: Noida, Uttar Pradesh, India
Experience: 7 yrs 10 mos
Skills
- Soc Design
- Physical Design
Career Highlights
- Expert in SoC physical design for advanced nodes.
- Proficient in EM/IR analysis and design feedback.
- Strong collaboration with RTL teams for design challenges.
Work Experience
Qualcomm
Senior Lead Engineer (1 yr 1 mo)
Intel Corporation
SoC Design Engineer (6 yrs 9 mos)
SoC Design Engineer (6 yrs 9 mos)
SoC Design Engineer (6 yrs 9 mos)
SoC Design Engineer (6 yrs 9 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Delhi
at B T KIT Dwarahat
