Akhil Peddada — Software Engineer
I am a Physical Design Engineer with 3 years of experience in the VLSI industry. I have worked on cutting-edge 5nm technologies with a focus on low-power implementation. My expertise includes floorplanning, placement, clock tree synthesis, routing, and ECOs. In addition to my work experience, I completed a 6-month training program in Physical Design Engineering at VEDA IIT, which provided me with a strong foundation in VLSI design and hands-on experience with industry-standard tools. During the program, I gained experience in areas such as timing closure, power analysis, and signal integrity analysis.
Stackforce AI infers this person is a VLSI Design Engineer with a focus on low-power technologies.
Location: Hyderabad, Telangana, India
Experience: 4 yrs 7 mos
Skills
- Physical Design
Career Highlights
- Expertise in low-power VLSI design.
- Hands-on experience with industry-standard tools.
- Strong foundation from VEDA IIT training.
Work Experience
Qualcomm
Senior Engineer (1 yr 4 mos)
Cadence Design Systems
Physical Design Engineer 2 (6 mos)
Physical Design Engineer 1 (5 mos)
Soctronics
Physical Design Engineer (2 yrs 4 mos)
VEDA IIT
Physical Design Engineer Trainee (6 mos)
Airport Authority Of India
Summer Intern (0 mo)
Education
Bachelor of Technology - BTech at Gayatri Vidya Parishad College of Engineering (Autonomous), 530048(CC-13)
Intermediate at Sasi Junior College