Hitesh Sajwan

Software Engineer

Delhi, India7 yrs 2 mos experience

Key Highlights

Master's student with strong circuit design skills.
Experience in physical design and verification at NVIDIA.
Internship focused on advanced post-routing methodologies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Hardware Engineering.

Contact

Skills

Core Skills

Physical DesignHardware Engineering

Other Skills

Synopsys IC CompilerMetal fill InsertionPower grid augmentationTCLAnalog Circuit DesignFloorplanningSignoffPhysical VerificationPNRCadence SoftwareStatic Timing AnalysisEquivalence CheckingDFTRTL DesignDigital Circuit Design

About

I am a master's student at IIITD Delhi and have worked on circuit level as well as complete RTL to GDS level projects. I have keen interest in circuit design and simulation, layout design, Physical design and working on newer tech nodes.

Experience

7 yrs 2 mos

Total Experience

2 yrs

Average Tenure

1 yr

Current Experience

Nvidia

Physical Design Engineer

May 2025 – Present · 1 yr · Bengaluru, Karnataka, India · On-site

Physical DesignHardware Engineering

Synopsys inc

2 roles

Senior Application Engineer

Jul 2024 – May 2025 · 10 mos · Noida, Uttar Pradesh, India · On-site

Hardware Intern

Jan 2024 – Jul 2024 · 6 mos · Noida, Uttar Pradesh, India · On-site

During my internship at Synopsys, I worked on Post routing methodologies like Metal fill Insertion, Power grid augmentation (PGA) using Redhawk and thermal via tower. Analyzed different flows for these methodologies in Order to Achieve the best QOR.
Also worked on process automation using TCL.

Synopsys IC CompilerPhysical DesignHardware Engineering