RAJESH JENA

Software Engineer

Bengaluru, Karnataka, India6 yrs 4 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC design and functional verification.
  • Proficient in static timing analysis and logic synthesis.
  • Experienced validation engineer at Intel Corporation.
Stackforce AI infers this person is a semiconductor validation engineer specializing in ASIC design and verification.

Contact

jenarajesh5383@gmail.comLinkedIn

Skills

Core Skills

Functional VerificationAsic Design

Other Skills

Application-Specific Integrated Circuits (ASIC)Static Timing AnalysisLogic SynthesisFormal VerificationTiming ClosureClock Tree Synthesis

Experience

6 yrs 4 mos
Total Experience
6 yrs 4 mos
Average Tenure
6 yrs 4 mos
Current Experience

Intel corporation

Functional Validation Engineer

Jan 2020 – Present · 6 yrs 4 mos · Bangalore Urban, Karnataka, India · Hybrid

Application-Specific Integrated Circuits (ASIC)Functional VerificationStatic Timing AnalysisLogic SynthesisAsic DesignFormal Verification+3

Education

Indian Institute of Technology Dhanbad

M.Tech — VLSI & Analog Ckt Design

Jan 2017 – Jan 2019

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