Vanjarapu Rajesh

Software Engineer

India4 yrs 10 mos experience

Highly Stable

Key Highlights

Experienced in Static Timing Analysis and Physical Design.
Currently a Senior Design Engineer at MediaTek.
Master's degree in VLSI System Design.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design.

Contact

Skills

Core Skills

Physical Design

Other Skills

Static Timing Analysis

Experience

4 yrs 10 mos

Total Experience

4 yrs 10 mos

Average Tenure

4 yrs 10 mos

Current Experience

Mediatek

2 roles

Senior Design Engineer

Jul 2021 – Present · 4 yrs 10 mos

physical design engineer

Static Timing AnalysisPhysical Design

Intern at MediaTek

Aug 2020 – Jun 2021 · 10 mos

Education

NITW

Master of Technology - MTech — VLSI System Design

Jan 2019 – Jan 2021

APIIIT, Rajiv Ghandhi University of Knowledge Technologies,Govt of Andhra Pradesh

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