Rohit Singh Toliya

Software Engineer

Bengaluru, Karnataka, India8 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in advanced VLSI layout design.
  • Led projects across multiple technology nodes.
  • Strong background in analog layout and design tools.
Stackforce AI infers this person is a Semiconductor Layout Design Engineer with expertise in advanced technology nodes.

Contact

LinkedIn

Skills

Core Skills

Layout DesignVlsi Design

Other Skills

3nm GPIO layout design7nm GPIO layout design10nm full chip GPIO layout designAnalog LayoutVerilogCadence VirtuosoResearchCadence Virtuoso Layout EditorCadence

About

Currently Working for Synapse Design Pvt Ltd as Layout Design engineer(Module Lead). Worked on Sankalp Semiconductor pvt ltd as technical lead from December,2018 to January,2022. Worked on Digicomm Semiconductor pvt ltd (client Sankalp Semiconctor) July,2017 to November,2018. Experienced in a variety of custom layout blocks like SERDES (Resistor Calibration block ), SERDES (TX LDO driver), GPIO IP’s, GPIO Physical Cell (Corner cell, Filler cells, Power-Break cell ), Amplifiers, Comparator Block, and Glitch Filter IP. Worked on different technologies nodes as 3nm, 6nm, 22nm,7nm, 10nm & 16nm.

Experience

8 yrs 10 mos
Total Experience
2 yrs 3 mos
Average Tenure
2 yrs
Current Experience

Amd

Sr. Layout Design Engineer

May 2024 – Present · 2 yrs · Bengaluru, Karnataka, India

Synapse design inc.

Module Lead

Jan 2022 – May 2024 · 2 yrs 4 mos · Bengaluru, Karnataka, India

Sankalp semiconductor

Layout Designer

Dec 2018 – Jan 2022 · 3 yrs 1 mo · Bangalore

  • Worked on 3nm GPIO layout design.
  • Worked on 7nm GPIO layout design.
  • worked on 10 nm full chip GPIO layout design.
3nm GPIO layout design7nm GPIO layout design10nm full chip GPIO layout designLayout DesignVLSI Design

Digicomm semiconductor private limited

Layout Design Engineer

Jul 2017 – Nov 2018 · 1 yr 4 mos · Bengaluru, Karnataka, India

  • Worked for Digicomm Semiconductor Pvt. Ltd. (Client Sankalp Semiconductor(Oct 2017-Nov 2018)) July 2017 to Nov 2018.

Education

Graphic Era University, Dehradun

Master of Technology (M.Tech.) — VLSI Design and System

Jan 2014 – Jan 2016

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