Santosh S

Associate Partner

Bengaluru, Karnataka, India20 yrs 2 mos experience
Highly Stable

Key Highlights

  • 18+ years in functional verification across multiple countries.
  • Led a 15-member verification team in North America and Europe.
  • Expertise in developing scalable verification frameworks.
Stackforce AI infers this person is a Semiconductor Verification Expert with extensive international experience.

Contact

Skills

Core Skills

Functional VerificationSystemverilogSoc

Other Skills

UVMHigh speed serdes ip verificationVerification consultingSOC verificationWireless TechnologiesRTL designASICFPGAStatic Timing AnalysisI2CAMBA AHBDebuggingVerilogModelSimIntegrated Circuit Design

About

18 + Years of experience in functional verification domain includes onsite project execution in USA, Germany, Japan, France,Italy locations including India for multiple semiconductor clients. Hands on Experience in development of Multi cluster scalable parametrized verification framework for networking and automotive chips ip/subsystem and SOC verification from test plan to coverage sign off using SV,UVM,OVM,SPECMAN along with ARM ,ARC processor test class library development. 15 member plus verification team leading experience across North America and Europe continental. List of Protocols and Standards worked: SERDES,PCIe,NVME,USB3.0,DDR,AXI,Ethernet,UART,SPI,I2C,IIC,JTAG,BVCI,IEEE 1394,SBP2,OHCI,XHCI,EHCI,eMMC,SDMMC,SDIO,OCP.

Experience

20 yrs 2 mos
Total Experience
3 yrs 3 mos
Average Tenure
4 mos
Current Experience

Eximietas design

Associate Director

Jan 2026Present · 5 mos · Bengaluru, Karnataka, India · On-site

Qualcomm

Senior Staff Engineer

Aug 2021Jan 2026 · 4 yrs 5 mos · Bangalore Urban, Karnataka, India

Intel corporation

Pre Si Validation Lead

Mar 2019Aug 2021 · 2 yrs 5 mos · India

Cadence design systems

Sr Principal Design Engineer

Jul 2018Mar 2019 · 8 mos · Bangalore

  • Worked on High speed serdes ip verification using System Verilog ,UVM based methodology.
System VerilogUVMHigh speed serdes ip verificationFunctional VerificationSystemVerilog

Eximius design

2 roles

Associate Director Hardware Engineering

Promoted

Jan 2018Mar 2018 · 2 mos

Verification Manager

Mar 2017Dec 2017 · 9 mos

Wipro technologies

Technical Leader (Asic Verification)

Jun 2006Dec 2016 · 10 yrs 6 mos · Folsom , California .

  •  Verification consultant across South and North America, Europe and India for server and network based IP and SOCs verification.
Verification consultingSOC verificationFunctional VerificationSoC

Sensact applications

Technical Leader

May 2005May 2006 · 1 yr · San Jose ,California

  • Worked on Wireless Technologies .
Wireless Technologies

Education

Savitribai Phule Pune University

B.E. — Electronics and Telecommunications

Jan 1996Jan 1999

Stackforce found 100+ more professionals with Functional Verification & Systemverilog

Explore similar profiles based on matching skills and experience