Bhoomika H — Intern

I am a Master's student in VLSI Design at Manipal School of Information Sciences, with a strong passion for the semiconductor and VLSI domain. My focus lies in digital design, RTL coding, and design verification. I am proficient in Verilog, VHDL, SystemVerilog, and UVM, and have hands-on experience with industry-standard EDA tools such as Cadence, Synopsys, and Mentor Graphics. My key areas of interest include functional verification, assertion-based verification, and testbench development, with a commitment to delivering high-quality and reliable silicon designs. While my primary expertise is in front-end design and verification, I am also expanding my knowledge into broader aspects of the VLSI design flow, including architectural design and exposure to physical design concepts. I am actively seeking opportunities across the VLSI domain where I can contribute to cutting-edge hardware design and verification, while continuing to deepen my expertise in semiconductor technologies.

Stackforce AI infers this person is a VLSI Design specialist with a focus on semiconductor technologies.

Location: Bengaluru, Karnataka, India

Experience: 0 mo