Gaurav Kamat — Product Engineer
An experienced VLSI circuit designer with a passion for semiconductors and integrated circuits. With over 7 years of professional experience, my expertise lies in IO circuit design, where I have successfully worked on a wide range of projects in 14nm, 10nm, 7nm, and n3 nodes. I have hands-on experience in designing LVCMOS IOs, LVDS IOs, GPIOs, overvoltage IOs, and failsafe IOs. Additionally, I have contributed to HBMIO and DDR5 projects, which have allowed me to stay at the forefront of cutting-edge technology in the industry. I have completed my M.Tech in Electrical Engineering specializing in Integrated Circuits and Systems from the prestigious IIT Madras. Throughout my journey, I have extensively used industry-standard tools such as Cadence tools, Spectre, Maestro, and Verifier to run simulations. My simulation expertise includes functionality and performance simulations, ESD simulations, and reliability simulations covering Gradual Aging, EOS, and EMIR. Working on RTL (Verilog A), dot-libs, and IBIS models has given me an in-depth understanding of the design process and has allowed me to produce high-quality and efficient designs. I have also been involved in several layout projects in the early stages of my career. This experience has given me a holistic view of the entire design flow.
Stackforce AI infers this person is a VLSI circuit design expert in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 11 mos
Skills
- Io Circuit Design
Career Highlights
- 7+ years in VLSI circuit design.
- Expertise in cutting-edge semiconductor technologies.
- Hands-on experience with industry-standard design tools.
Work Experience
Intel Corporation
IO Design Engineer (2 yrs 4 mos)
HCLTech
Senior Technical Lead (7 yrs 7 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Madras