Gaurav Kamat

Product Engineer

Bengaluru, Karnataka, India9 yrs 11 mos experience
Highly Stable

Key Highlights

  • 7+ years in VLSI circuit design.
  • Expertise in cutting-edge semiconductor technologies.
  • Hands-on experience with industry-standard design tools.
Stackforce AI infers this person is a VLSI circuit design expert in the semiconductor industry.

Contact

Skills

Core Skills

Io Circuit Design

Other Skills

FailsafeovervoltageIOCadence VirtuosoCadence SpectreCadenceMaestroReliabilityLVCMOSLVDSGPIOHBMDDR5VerifierAnalog Circuit DesignIntegrated Circuit Design

About

An experienced VLSI circuit designer with a passion for semiconductors and integrated circuits. With over 7 years of professional experience, my expertise lies in IO circuit design, where I have successfully worked on a wide range of projects in 14nm, 10nm, 7nm, and n3 nodes. I have hands-on experience in designing LVCMOS IOs, LVDS IOs, GPIOs, overvoltage IOs, and failsafe IOs. Additionally, I have contributed to HBMIO and DDR5 projects, which have allowed me to stay at the forefront of cutting-edge technology in the industry. I have completed my M.Tech in Electrical Engineering specializing in Integrated Circuits and Systems from the prestigious IIT Madras. Throughout my journey, I have extensively used industry-standard tools such as Cadence tools, Spectre, Maestro, and Verifier to run simulations. My simulation expertise includes functionality and performance simulations, ESD simulations, and reliability simulations covering Gradual Aging, EOS, and EMIR. Working on RTL (Verilog A), dot-libs, and IBIS models has given me an in-depth understanding of the design process and has allowed me to produce high-quality and efficient designs. I have also been involved in several layout projects in the early stages of my career. This experience has given me a holistic view of the entire design flow.

Experience

9 yrs 11 mos
Total Experience
7 yrs 7 mos
Average Tenure
2 yrs 4 mos
Current Experience

Intel corporation

IO Design Engineer

Feb 2024Present · 2 yrs 4 mos · India

IO circuit designFailsafe

Hcltech

Senior Technical Lead

Jun 2016Jan 2024 · 7 yrs 7 mos · Hubli, Karnataka, India

Education

Indian Institute of Technology, Madras

Master of Technology - MTech — Integrated Circuit Design

Stackforce found 46 more professionals with Io Circuit Design

Explore similar profiles based on matching skills and experience