Chetan Kumar

Product Manager

Delhi, India2 yrs 11 mos experience

Highly Stable

Key Highlights

Expert in MIPI CSI/DSI protocols and verification.
Strong background in UVM and SystemVerilog.
Proven track record in customer-facing verification support.

Stackforce AI infers this person is a Verification Engineer specializing in semiconductor protocols and design verification.

Contact

Skills

Core Skills

Verification EngineeringProtocol Verification

Other Skills

MIPI CSI/DSI Verification IPsProtocol DebuggingUVM Testbench DevelopmentVerilogSystemVerilogUVMMIPI DSI & CSI Family of Verification IPsVCS SimulatorVERDIDVELinuxApplication EngineersUniversal Verification Methodology (UVM)C++Data Structures

About

Open to work for Design Verification, SoC/IP Verification, and Protocol Verification roles. Verification Engineer with strong expertise in Verilog, SystemVerilog, UVM, and MIPI CSI/DSI protocols along with C-PHY and D-PHY. Experienced in end-to-end VIP deployment, UVM testbench development, protocol debugging, regression validation, and customer-facing verification support. Currently working at Synopsys as a Senior Solution Engineer, handling MIPI CSI/DSI Verification IPs and supporting global customers with complex protocol and testbench debugging. Hands-on experience in deploying verification environments in customer setups, developing in-house verification solutions, creating UVM-based test environments, and validating protocol compliance. Skilled in debugging complex system-level issues, developing automation/utilities using Python, and working closely with verification, R&D, and customer teams to deliver robust verification solutions. Actively looking for opportunities in Design Verification, SoC/IP Verification, Protocol Verification, and related semiconductor verification domains.

Experience

2 yrs 11 mos

Total Experience

2 yrs 11 mos

Average Tenure

2 yrs 11 mos

Current Experience

Synopsys inc

3 roles

Sr. Protocol Solution Engineer

Promoted

Feb 2025 – Present · 1 yr 4 mos

MIPI CSI/DSI Verification IPsProtocol DebuggingUVM Testbench DevelopmentVerification EngineeringProtocol Verification

Solution Engineer

Jul 2023 – Feb 2025 · 1 yr 7 mos

Application Engineer

Aug 2022 – Jul 2023 · 11 mos

As an Application Engineer intern, I am responsible for:-
Direct Deployment of MIPI DSI & CSI Family of Verification IPs (DSI, DSI2, CSI and CSI2) in customer
Testbench.
This includes setting up of Testbench with VIP & DUT over different Physical layers (CPHY and DPHY).
Managing customer accounts all over the globe.
Working with the development teams on the collaterals and documentations for the MIPI CSI and DSI product line.
Creation and Execution of Testcases for the complete verification cycle of customer IP’s/DUT
Debugging Protocol and testbench-related queries during the course of Verification.
Creating the different utilities to ease the debug process.
Languages working on:
VERILOG | System-VERILOG | UVM
Tools working with:
VCS Simulator | VERDI | DVE | LINUX | GVIM editor | Salesforce | JIRA |