Bhagyashree Sada — Software Engineer
I have good Experience in Analog and Mixed Signal IC layout Designs. Good experience in clearing LVS DRC with better quality of layouts and communication with design team for ECO's. Technologies: TSMC 3nm,7nm, TSMC 40nm, Intel 3nm, Intel 5nm, Intel 18A, GPDK 180. Projects: Serdes(GDDR7), LDO(ADPLL) Specialties Floor planning, Area optimization, Matching techniques, Sheilding, Parasitic extraction, Handling Failure mechanisms, VERIFICATION TOOLS:CALIBRE, PVS,LVG (DRC, LVS and hipallf bundle) good grip on Cadence Virtuoso 6.1.5.
Stackforce AI infers this person is a skilled Analog Layout Engineer in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 2 yrs
Skills
- Analog Layout Design
- Floor Planning
Career Highlights
- Expert in Analog and Mixed Signal IC layout designs.
- Proficient in LVS DRC with high-quality layouts.
- Strong communication skills with design teams.
Work Experience
HCLTech
Analog layout Engineer (2 yrs)
aiit institute
Trainee at Aiit Institute Bangalore (10 mos)
Education
Bachelor of Engineering - BE at Basaveshwar Engineering College (A), Bagalkote