ANUPAM YADAV

Product Engineer

Bengaluru, Karnataka, India8 yrs 5 mos experience
Highly Stable

Key Highlights

  • Expert in DFT methodologies and ATPG solutions.
  • Strong background in VLSI design and testing.
  • Proficient in multiple EDA tools and languages.
Stackforce AI infers this person is a DFT Engineer with expertise in VLSI design and testing.

Contact

LinkedIn

Skills

Core Skills

Dft

Other Skills

Automatic Test Pattern Generation (ATPG)IjtagDFTSEQScan Streaming Newtwork (SSN)Joint Test Action Group (JTAG)JTAGTetramaxXceliumTessent EDTPrime timeSynopsys Design CompilerCoverage improvementTiming and No-timing simulationPost silicon debugVerilog

Experience

8 yrs 5 mos
Total Experience
3 yrs 6 mos
Average Tenure
1 yr 5 mos
Current Experience

Broadcom

R & D Engineer IC Design

Jan 2025 – Present · 1 yr 5 mos · Bengaluru, Karnataka, India · On-site

Mediatek

2 roles

Senior DFT Engineer

Promoted

Jan 2019 – Jan 2025 · 6 yrs

Automatic Test Pattern Generation (ATPG)DFT

DFT Engineer

Jul 2018 – Jun 2019 · 11 mos

Unacademy

Varified Educator

Jan 2018 – Jul 2018 · 6 mos

Education

National Institute of Technology, Tiruchirappalli

Masters of technology — VLSI

Jan 2016 – Jan 2018

AJAY KUMAR GARG ENGINEERING COLLEGE, GHAZIABAD

Bachelor of Technology (B.Tech.)

Jan 2011 – Jan 2015

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