Chintan Patel — Software Engineer
- 10+ years of experience in ASIC Verification. - Experience on USB 2.0, AMBA AHB, APB, AXI, SMMUv3 protocol. - Practical exposure of working in various phases of Verification IP development. - Experience in RTL Functional Verification and Functional & Code Coverage. - Experience in Constrained Driven Verification (CDV) & regression management. - Hands-on expertise of working on Test Plan & Test bench development in UVM environment - Proficient in writing test cases, simulation and debugging. - Experience in building verification environment from scratch using Verilog, SystemVerilog and methodologies like UVM. - Good Understanding of ASIC Design Flow and Design Verification Techniques.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in ASIC design and verification.
Location: Bengaluru, Karnataka, India
Experience: 13 yrs 5 mos
Skills
- Asic Verification
- Functional Verification
Career Highlights
- Over 10 years of ASIC Verification experience.
- Expertise in USB 2.0 and AMBA protocols.
- Proficient in UVM environment and test case development.
Work Experience
Senior Design Verification Engineer (2 yrs 1 mo)
Qualcomm
Lead Engineer Sr. (2 yrs 11 mos)
Intel Corporation
SOC verification engineer (3 yrs 5 mos)
PerfectVIPs
ASIC verification engineer (4 yrs 2 mos)
Asic verification trainee (5 mos)
Maven Silicon softech pvt. ltd.
intern (3 mos)
Maven Silicon
Asic verification & design trainee (5 mos)
Education
Bachelor of Engineering (BE) at L.D.R.P institute of technology