Jashuva Raj Kumar — Product Engineer
I am a motivated and detail-oriented Design Verification Engineer, trained at VLSI FIRST, Bengaluru, with hands-on experience in SystemVerilog, UVM, and RTL Design. I have developed and verified AXI, APB, and I2C protocol-based environments using constraint-random, coverage-driven, and assertion-based verification methodologies. My focus lies in building reusable and scalable UVM testbenches, performing functional coverage analysis, and ensuring design correctness through assertions and debugging using QuestaSim. I am passionate about contributing to SoC verification teams, where I can apply my technical expertise and continuous learning mindset to deliver high-quality verification solutions.
Stackforce AI infers this person is a Design Verification Engineer specializing in SoC verification methodologies.
Location: Bengaluru, Karnataka, India
Experience: 0 mo
Skills
- Universal Verification Methodology (uvm)
- Assertion Based Verification
Career Highlights
- Hands-on experience in SystemVerilog and UVM.
- Expertise in AXI, APB, and I2C protocol verification.
- Passionate about delivering high-quality SoC verification solutions.
Work Experience
VLSI FIRST
Trainee (9 mos)
Education
Bachelor of Technology - BTech at Karunya Institute of Technology and Sciences
Intermediate at Narayana Junior College
SSC at Sri vani convent & high school
