Jay Meghani

Software Engineer

Bengaluru, Karnataka, India3 yrs 4 mos experience

Most Likely To Switch

Key Highlights

Over 2 years of experience in Silicon Design and Verification.
Expertise in Verification IP design and development.
Proficient in industry-standard tools and methodologies.

Stackforce AI infers this person is a Semiconductor Verification Engineer with a strong focus on RTL Design and Synthesis.

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Skills

Core Skills

Rtl Design/synthesisVerification Ip

Other Skills

Logic SynthesisRTL DevelopmentVerilogSystemVerilogGitStatic Timing AnalysisCarepath AnalysisTCLSynthesisConformal LECAutomatic Test Pattern Generation (ATPG)Synopsys Design CompilerSynopsys PrimetimeFunctional CoveragePython

About

I have 2+ years of industry experience in Silicon Design and Verification, Experienced in Verification IP design and development with the demonstrated history of working with different industry standard tools and technology. Self motivated and learning mindset. Specialties:- - RTL Design/Synthesis - Verification IP

Experience

3 yrs 4 mos

Total Experience

1 yr 8 mos

Average Tenure

2 yrs 8 mos

Current Experience

Mediatek

Synthesis Engineer

Oct 2023 – Present · 2 yrs 8 mos · Bengaluru, Karnataka, India · On-site

Logic SynthesisRTL DevelopmentRTL Design/Synthesis

Intel corporation

Pre-Silicon Verification Intern

Sep 2022 – May 2023 · 8 mos · Bengaluru, Karnataka, India · Hybrid

Drove design/verification methodologies for UCIe Interconnect IPs for Next-Gen Xeon Server SoC products.
Responsible for debugging and compilation tool integration.

VerilogSystemVerilogVerification IP