Sateesh Bandaru — Software Engineer

UVM | UVM RAL | system verilog | verilog |digital electronics| code coverage | functional coverage | system verilog assertions | static timing analysis | FSM based design | basic electronics | perl for scripting. protocols:AHB , APB,AXI , UART , I2C and PCIe Tools: Verification :Questasim (mentor graphics) VCS (Synopsys) Xcelium , IMC , Jaspergold (Cadence) Design : Ise (Xilinx) Also,had experience on processor verification using c based testcases. My skill sets contains the above mentioned domain areas,I am the person who always work on my skills to upgrade myself.

Stackforce AI infers this person is a Verification Engineer specializing in digital electronics and hardware verification.

Location: Bengaluru, Karnataka, India

Experience: 6 yrs 6 mos