Vijay Rama Pramod Kappagantula

CEO

Bengaluru, Karnataka, India23 yrs 11 mos experience
Most Likely To SwitchAI Enabled

Key Highlights

  • Over two decades of experience in FPGA/SoC development.
  • Expert in managing cross-functional teams for hardware projects.
  • Proven track record in driving innovation and optimizing resources.
Stackforce AI infers this person is a seasoned leader in Hardware Engineering with a focus on FPGA solutions in the Telecommunications sector.

Contact

LinkedIn

Skills

Core Skills

FpgaTechnical Leadership

Other Skills

People ManagementField-Programmable Gate Arrays (FPGA)Intel Quartus PrimeXilinx VivadoVerilogLeadershipArtificial Intelligence (AI)EntrepreneurshipIntegrationHardwareTelecommunicationsEDADebuggingEthernetWireless

About

Cisco empowers teams to deliver cutting-edge FPGA solutions across SP routing, SP access, Optical, and Cable platforms under my leadership. With over six years as a Senior Leader/Manager in Hardware Engineering, contributions include driving innovation, optimizing resource management, and collaborating with cross-functional teams to ensure seamless project execution. Focused on fostering technical excellence, vendor partnerships, and team cohesion, our work consistently delivers impactful results for mission-critical hardware systems. With over two decades of experience in FPGA/SoC development, my commitment lies in enabling scalable, efficient, and forward-looking solutions for advanced networking platforms.

Experience

23 yrs 11 mos
Total Experience
2 yrs 10 mos
Average Tenure
13 yrs 11 mos
Current Experience

Inflection point ventures

Angel Investor

Mar 2024 – Jan 2026 · 1 yr 10 mos

Cisco

3 roles

Senior Leader/Manager Hardware Engineering

Promoted

Aug 2019 – Present · 6 yrs 8 mos

  • I manage FPGA development across SP routing, SP access, Optical and Cable platforms.
People ManagementField-Programmable Gate Arrays (FPGA)Intel Quartus PrimeTechnical LeadershipXilinx VivadoVerilog+3

Technical Leader

Nov 2016 – Jul 2019 · 2 yrs 8 mos

  • FPGA Development for ASR9K, NCS560, NCS4K, NCS1K, NCS5500 and CRS platforms.
  • Resource Management.

ASIC Engineer

Mar 2012 – Oct 2016 · 4 yrs 7 mos

  • FPGA Development

Freescale semiconductor

Lead Design Engineer

Nov 2010 – Mar 2012 · 1 yr 4 mos · Bengaluru Area, India

  • SoC Development based on PowerQUICC II Pro e300 cores

Juniper networks

Hardware Engineer

Feb 2006 – Nov 2010 · 4 yrs 9 mos · Bengaluru Area, India

  • FPGA Development for the M and MX Series routers.

Telsima

Hardware Engineer

Jun 2004 – Feb 2006 · 1 yr 8 mos · Bengaluru Area, India

  • FPGA Development
  • 1. Resilient Packet Ring - IEEE 802.17
  • 2. Digital Circuit Multiplication Equipment (DCME)

Nortel networks

Engineer

Jan 2004 – May 2004 · 4 mos · Raleigh-Durham, North Carolina Area

  • Product validation of Succession Media Gateway 9000

Texas a&m university

Teaching Assistant

Sep 2001 – Dec 2002 · 1 yr 3 mos · Bryan/College Station, Texas Area

  • Circuit Analysis lab

Dallas semiconductor

Intern Design Engineer

May 2001 – Aug 2001 · 3 mos · Dallas/Fort Worth Area

  • ASIC IP development.

Texas instruments

Intern (PS-II program from BITS, Pilani)

Jan 2000 – Jun 2000 · 5 mos · Bengaluru Area, India

  • Functional verification of DSP sub-system

Education

Texas A&M University

MS — Computer Engineering

Jan 2000 – Jan 2003

Birla Institute of Technology and Science, Pilani

BE (Hons.) — Electrical and Electronics

Jan 1996 – Jan 2000

Indian Institute of Management, Calcutta

Executive Program in Leadership and Management — Strategy

Jan 2015 – Jan 2016

Indian Institute of Management, Kozhikode

Entrepreneurship and New Venture Creation

Aug 2022 – Jul 2023

Padma Seshadri Bala Bhavan Sr. Sec. School

Jan 1983 – Jan 1996

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