Nagendra Varma — Product Manager

Technical Skills • HDL: Verilog • HVL: System Verilog • Verification Methodologies: Constraint Random Coverage Driven Verification Assertion Based Verification • TB Methodology: UVM • HPC Protocols: PCIe UCIe • EDA Tool: Intel – Quartus Mentor Graphics - Questasim Xilinx - ISE Synopsys - VCS Cadence - Xcelium • Domain: ASIC/FPGA front-end Design and Verification • Operating System: Linux • Scripting Languages: Perl Scripting

Stackforce AI infers this person is a skilled engineer in ASIC/FPGA design and verification.

Location: Bengaluru, Karnataka, India

Experience: 2 yrs 5 mos