Vishal Raj — Software Engineer
As a Silicon Design Engineer at AMD, I apply my skills in Formal and Functional verification and digital IC design to create innovative solutions for the semiconductor industry. I have a strong background in VLSI Design, having completed my MTech from National Institute of Technology, Kurukshetra. I am passionate about learning new technologies and staying updated with the latest trends in the field. I have also earned certifications in Verilog HDL and UVM for Verification from Udemy, demonstrating my commitment to continuous learning and professional development.I am passionate about learning new technologies and skills, and contributing to the innovation and quality of the products and services I work on. The following is some of my skills and Specialties : Technical Skills : 👉 Languages: System Verilog, Verilog,C++,Python,Perl 👉Verification Methodologies: UVM 👉Protocols: APB,I2C, SPI, UART , DDR4 , USB-4 👉EDA Tools: SYNOPSYS VCS, DVE 👉Formal Verification Tools: VC Formal, Jasper Gold Specialities : ✔️Good knowledge of fundamentals of Digital Design Concepts. ✔️Depth Understanding of the ASIC Verification Flow, TestPlan & Test bench architecture. ✔️TB Architecture and Test Plan Development. ✔️Proficient in Verilog & SystemVerilog & Knowledge of UVM. ✔️Worked on Assertion development, Functional coverage & Created functional tests. ✔️Worked on code coverage analysis and coverage closure. ✔️Hands-on experience on Formal tools like VC Formal and Jasper gold . 👉FPV, CC , COV, FuSa, FXP, Low Power Verification App. ✔️Worked closely with RTL designers to specify, develop and debug constrained-random and directed test cases toward coverage-driven verification closure. Along with Verification i also have experience in performing DFT tests like scan, BIST, at-speed, IDDQ, and boundary scan (JTAG). Skilled in functional and on-line testing for reliable fault detection and error correction.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in formal and functional verification.
Location: Hyderabad, Telangana, India
Experience: 1 yr 11 mos
Skills
- Formal Verification
- Functional Verification
Career Highlights
- Expert in Formal and Functional Verification methodologies.
- Strong background in VLSI Design and digital IC design.
- Proficient in UVM and formal verification tools.
Work Experience
AMD
Silicon Design Engineer 2 (1 yr 11 mos)
Intern (11 mos)
Bharat Sanchar Nigam Limited
Summer Intern (1 mo)
Education
Master of Technology - MTech at National Institute of Technology, Kurukshetra, Haryana
Master of Technology - MTech at Indian Institute of Technology, Patna
