Piyush Yenkar — Software Engineer
Synopsys (Serdes) DFT,Packiging, ATE Simulations, Automations, multiple silicon bringups Graphics Design (GPU) Methodology and DFX Tool lead Sr DFT Engineer at Mediatek, Banglore Mobile Market (5G) DFT Scan pattern geneation and simulation for mobile chips [3nm] Post Silicon Validation & Test Engineer ONSemiconductor, Banglore CMOS Image Sensors MBIST Validation , Product post silicon validation and ATE yeild analysis/improvemnet
Stackforce AI infers this person is a DFT and validation expert in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 4 mos
Skills
- Dft
- Packaging
Career Highlights
- Expert in DFT and silicon validation.
- Led DFT methodologies for mobile chip designs.
- Experience in ATE yield analysis and improvement.
Work Experience
Synopsys Inc
Staff Engineer (2 yrs 3 mos)
Sr Digital Design Engineer (11 mos)
Intel Corporation
Graphics Hardware Engineer (1 yr 3 mos)
System Validation Engineer (2 yrs)
MediaTek
Senior DFT Engineer (8 mos)
ON SEMICONDUCTOR TECHNOLOGY INDIA PRIVATE LIMITED
Product Engineer (1 yr 9 mos)
Product Engineer ( Intern) (1 yr)
RattanIndia Power Ltd
Junior Electrical Engineer (10 mos)
Cummin's Generator Technologies India Ltd.
Intern (11 mos)
Education
Master's degree at Vellore Institute of Technology
Bachelor's degree at P.D.V.V.P.COE,Ahmednagar
State Board Maharashtra at K Narkhede Vidyalaya , Bhusawal
