V

Vinay Jain

Software Engineer

Bengaluru, Karnataka, India17 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 15+ years of experience in VLSI Design.
  • Expert in low power design and front-end design flow.
  • Led design of Snapdragon chipsets and complex memory subsystems.
Stackforce AI infers this person is a Semiconductor and Telecommunications expert with extensive VLSI design experience.

Contact

LinkedIn

Skills

Core Skills

Cpu DesignRtl DesignMemory SubsystemDesignFpga

Other Skills

IntegrationRead/Write CoresGSMVerilogAMBAModelSimSystem VerilogSpyglassVerdiJasperSynopsys PrimetimePerl ScriptC++AlgorithmsDebugging

About

15+ Years of experience in VLSI Design. Exposure to all the aspects of front-end design flow: uArch, RTL Design, Implementation and Power Specialties: Modem/CPU/WLAN, front-end design, low power design

Experience

17 yrs 5 mos
Total Experience
8 yrs 8 mos
Average Tenure
16 yrs
Current Experience

Qualcomm

5 roles

Senior Staff Engineer

Promoted

Dec 2021 – Present · 4 yrs 5 mos

Staff Engineer

Jul 2017 – Nov 2021 · 4 yrs 4 mos

Lead Senior Engineer

Jan 2015 – Jun 2017 · 2 yrs 5 mos

Senior Engineer

Jan 2012 – Dec 2014 · 2 yrs 11 mos

  • CPU Sub-system
  • Worked on Design/Integration of ARM's CortexA* based Application Processor Sub-systems for Qualcomm's Snapdragon series of chipsets

Engineer

Jan 2010 – Dec 2011 · 1 yr 11 mos

  • Memory Sub-system
  • Design of complex Read/Write Cores of Memory Subsystems for Qualcomms Multimode Modems

Anveshan telecom

Member, Technical Staff

Jul 2008 – Dec 2009 · 1 yr 5 mos · Bengaluru Area, India

  • * Worked on FPGA based RTL Design for GSM voice/data compression modules on Abis interface between the BTS and BSC

Education

Indian Institute of Technology, Kanpur

B. Tech — Electrical Engineering

Jan 2004 – Jan 2008

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