Gaurav Kumar — Software Engineer
Currently working as a Soc Verification Engineer (owning Interrupt, SDMA/LSDMA, HDP & VPE block of APU SOC) at AMD and previously I was working with Cadence design systems, noida as a DV engineer. My skill set include System Verilog/ UVM based verification, writing RTL models in Verilog, ,integration, coverage analysis/closure, MSIE, TCL, Debugging and scripting for automation. I completed my Bachelor's in Electronics Instrumentation and Control Engineering from YMCA University of Science and Technology, Faridabad. I enjoy learning about the latest technological advancements.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SoC design and verification methodologies.
Location: Faridabad, Haryana, India
Experience: 8 yrs 4 mos
Skills
- System Verilog
- Verification
Career Highlights
- Expert in System Verilog and UVM-based verification.
- Proven experience in SoC design verification at AMD.
- Strong background in debugging and automation scripting.
Work Experience
NXP Semiconductors
Staff design verification engineer (1 yr 7 mos)
AMD
Sr. Silicon Design Engineer (Soc Design verification engineer) (3 yrs 1 mo)
Cadence Design Systems
DV Engineer ll (1 yr)
DV Engineer l (1 yr 6 mos)
Intern (8 mos)
DKOP Labs Pvt. Ltd.
Design and Verification engineer (6 mos)
Defence Research and Development Organisation (DRDO)
Worked as an hardware engineer (6 mos)
Edubotix Innovation Labs
Worked on real time embedded projects (1 mo)
Education
Bachelor of Technology - BTech at YMCA University of Science & Technology
All India Senior School Certificate Examination at St. John's School, Sector 7/A, Faridabad
at St. John's school
