Jiban Jyoti Nayak — Software Engineer

Experienced and driven professional with over 9 years in ASIC physical design, synthesis and constraint writing. Skilled in managing complex block-level and top-level designs from RTL to GDSII, including large-scale video cores, camera blocks, and high-speed ARM CPUs. Proficient in utilizing both Synopsys and Cadence EDA tools, adept at handling designs with inter-block channels and incorporating thousands of feed-throughs and low power within blocks. Demonstrated success in executing multiple tape-outs across various advanced technology nodes, ranging from 28nm to 3nm.

Stackforce AI infers this person is a semiconductor design expert with a focus on ASIC physical design and low-power implementations.

Location: Bengaluru, Karnataka, India

Experience: 9 yrs 4 mos