Tapan Rath

CEO

Bengaluru, Karnataka, India23 yrs experience

Most Likely To SwitchHighly Stable

Key Highlights

20+ years of experience in CPU emulation.
Expert in verification of server processors and SOC modules.
Proven leadership in technical emulation projects.

Stackforce AI infers this person is a Semiconductor and Embedded Systems expert with extensive experience in verification and emulation.

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Skills

Core Skills

EmulationVerificationSystem Level VerificationFunctional VerificationIntegration

Other Skills

ValidationMicro Server SegmentsARM AMBA protocolPalladiumVerilogFormal verificationZEBU emulationVHDLARM ProtocolARM7ARM 9Emulation DVE developmentFPGA based emulationPalladium based emulationIntel architecture

About

Experienced Sr Technical Lead with 20+ years of proven track record in Verification of Server Processor's, IP's using Emulation FPGA, HYBRID, CPU and SW solutions.

Experience

23 yrs

Total Experience

5 yrs 9 mos

Average Tenure

19 yrs

Current Experience

Intel corporation

Sr CPU Emulation Verification/Validation Lead.

May 2007 – Present · 19 yrs · Bangalore, india

Presently working with Intel Technology India Pvt Ltd as a Senior Lead in Emulation for EX/EP & latest Micro Server Segments.

EmulationVerificationValidationMicro Server Segments

Freescale semiconductor

Design engineer

Jan 2006 – Jan 2007 · 1 yr · Noida Area, India

Design engineer responsible for Emulation /System level Verification of SOC modules on ARM based commercial-tier processor which is an implementation of award-winning Mobile Extreme Convergence architecture.
Involved in the Emulation /System level Verification of standalone & Full chip SOC modules.
ARM AMBA protocol exposure.
Arm debuggers used for debugging complex Post silicon Bugs.
Tools/Languages Used: Palladium (Cadence); Verilog

EmulationSystem level VerificationARM AMBA protocolPalladiumVerilog

Wipro technologies

project engineer

Jan 2004 – Jan 2006 · 2 yrs · Bengaluru Area, India

Project Engineer invovled in integration of various blocks as per the specifications of the design; to develop an ARM7/Cortex microprocessor core based micro-controller design.
Verify the Integration of the self-owned Peripheral and Internal clients to the SoC by using the Functional/formal verification & ZEBU emulation flow.
Tools/Languages Used: VHDL, ARM Protocol, cadence LEC, synopsys formality, spy glass check.

IntegrationFunctional verificationFormal verificationZEBU emulationVHDLARM Protocol