Skills

• Asic Design
• Rtl Design

Career Highlights

• Expert in ASIC and RTL design methodologies.
• Proficient in static timing analysis and digital design.
• Strong background in FPGA and verification techniques.

Work Experience

Education

Master’s Degree at PES University

Engineer's Degree at Sri Siddhartha Institute of Technology (Autonomous under VTU)

PUC at Sri Siddaganga PU College for Boys

High School at Siddaganga High School