Dr. Neelam Surana

Software Engineer

Ahmedabad, Gujarat, India8 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in designing efficient embedded memory solutions.
  • Experience in aerospace and machine learning memory applications.
  • Strong background in CMOS VLSI Design and Memory Compiler development.
Stackforce AI infers this person is a VLSI Design expert specializing in memory architecture for advanced computational systems.

Contact

Skills

Core Skills

Cmos Vlsi DesignMemory Compiler

Other Skills

Cadence VirtuosoMemory LayoutIn-Memory ComputingSRAMDRAMComputer ArchitectureFinFETShell ScriptingLinuxArtificial Neural NetworksarchitectureCache hierarchyMicrosoft Officeskill scriptingCMOS analog design

About

Description of my research work is as follows: Memory is the major bottleneck in the current computational architectures, as data transmission is a slow and energy-hungry process. We work extensively on designing of efficient embedded memory. We look at the applications and exploit its property and requirement to develop memory. For example, the aerospace application requires reliable memory, whereas approximate but energy-efficient memories can be used for multimedia and machine learning applications. We have design in-house Memory-complier. The applications for which we design memories are; Multicore Processor, Space Applications, Multimedia Applications, Neural Network, and CAMs.

Experience

8 yrs 8 mos
Total Experience
2 yrs 2 mos
Average Tenure
4 yrs 5 mos
Current Experience

Nvidia

Senior ASIC Engineer

Dec 2021Present · 4 yrs 5 mos · Bangalore Urban, Karnataka, India

Cadence VirtuosoMemory LayoutIn-Memory ComputingSRAMDRAMCMOS VLSI Design+5

Ceremorphic

Senior Memory Design Engineer

Jul 2020Dec 2021 · 1 yr 5 mos · Hyderabad, Telangana, India

Indian institute of technology gandhinagar

7 roles

Graduating Teaching Fellow: VLSI Design

Promoted

Aug 2019Jul 2020 · 11 mos

  • Co-teaching VLSI Design with Prof. Joycee Mekie

Teaching Assistant for CMOS analog IC Design course under Prof. Nihar Ranjan Mohapatra

Jan 2019Apr 2019 · 3 mos

Teaching Assistant for VLSI Design course under Prof. Joycee Mekie

Jul 2018Dec 2018 · 5 mos

Teaching Assistant for CMOS Analog IC Design course under Prof. Nihar Ranjan Mohapatra

Jan 2018Apr 2018 · 3 mos

Teaching Assistant for VLSI Design course under Prof. Joycee Mekie

Jul 2017Dec 2017 · 5 mos

Teaching Assistant for CMOS Analog IC Design course under Prof. Nihar Ranjan Mohapatra

Jan 2017Apr 2017 · 3 mos

Teaching Assistant for VLSI Design course under Prof. Joycee Mekie

Jul 2016Dec 2017 · 1 yr 5 mos

Education

Indian Institute of Technology Gandhinagar

Doctor of Philosophy - PhD — VLSI Design

Jan 2015Jan 2020

Indian Institute of Technology, Kanpur

Master's degree — Electrical Engineering

Jan 2011Jan 2013

Shri Shankaracharya Technical Campus Bhilai

B.E — Electronics and Telecommunication

Jan 2007Jan 2011

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