Henrique de Sousa

Software Engineer

Porto, Porto, Portugal3 yrs 9 mos experience
Highly Stable

Key Highlights

  • Over 3 years of ASIC design experience.
  • Contributed to multiple successful IP releases.
  • Expertise in RTL Design and Logic Synthesis.
Stackforce AI infers this person is a Digital Design Engineer in the Semiconductor industry.

Contact

Skills

Core Skills

Rtl DesignLogic SynthesisDft

Other Skills

CryptographyCXLSynopsys toolsScriptingRTL DevelopmentScalaC (Programming Language)Python (Programming Language)RISC-VVerilogHTMLCSSSQLProblem SolvingEngineering

About

ASIC Digital Designer with more than 3 years of experience at Synopsys, working on the CXL IDE project. Experienced in designing, implementing, testing and synthesizing IPs. Have been part in multiple successful IP releases to clients.

Experience

3 yrs 9 mos
Total Experience
3 yrs 9 mos
Average Tenure
3 yrs 9 mos
Current Experience

Synopsys inc

2 roles

ASIC Digital Design Staff Engineer

Promoted

May 2026Present · 1 mo

CryptographyCXLDFTRTL DesignSynopsys toolsLogic Synthesis+13

ASIC Design Engineer

Sep 2022May 2026 · 3 yrs 8 mos

DFTCryptography

Education

Faculdade de Engenharia da Universidade do Porto

Mestrado integrado em engenharia eletrotécnica e de computadores — Telecommunications Engineering

Jan 2017Jan 2022

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