Mar 2018 – Feb 2020 · 1 yr 11 mos · Bengaluru Area, India

• Memory circuit design ( single port, multi port high speed, high density, Ultra low leakage) and validation, Analysis of memory marginality, Memory design infrastructure, specs and fuctional checks. CCS/NLDM Dynamic Power characterisation for different mode of memory (functional, Powergates), Leakage Power Characterisation(functional, Powergates). Circuit checks.
• Design Assurance Report analysis.

Aug 2013 – Mar 2018 · 4 yrs 7 mos · Bengaluru Area, India

• CMOS Digital circuit Design, PDK Assessment, HSPICE and Spectre Simulation.
• High Speed circuit and layout design, High speed ALU Design and PPA Analysis. Layout Design and Post-layout analysis.
• SRAM circuit and layout design. Register file, 6T(W/R), 8T(1R/1W)single port, 8T (2R/W) Dual port Memory Design simulation and analysis. Circuit Checks.
• Standard Cell Library Design and PPA analysis.
• Model Hardware correlation(MHC)
• Perl/Shell/TCL scripting

Aug 2013 – Jan 2014 · 5 mos · Bengaluru Area, India

• Standard cell circuit and layout Design, Memory circuit and layout design, Circuit Checks, Custom circuit and layout Design.