Ashish Trambadia

Software Engineer

Bengaluru, Karnataka, India24 yrs 3 mos experience

Key Highlights

Expert in Low Power Implementation techniques.
Proficient in High Level Synthesis using C/C++.
Extensive experience in IP/SoC Development and Verification.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in low power and high level synthesis.

Contact

Skills

Core Skills

Low Power ImplementationUpfHigh Level SynthesisC/c++

Other Skills

TCLPython (Programming Language)Synopsys toolsSynopsys Design CompilerEDAHLSTLMVirtualizerImage ProcessingSystemC

About

Specialties: - - Low Power Implementation - IP/SoC Development and Verification - High Level Synthesis - RTL/TLM Design - Technology Research

Experience

24 yrs 3 mos

Total Experience

Average Tenure

Current Experience

Synopsys inc

4 roles

Application Engineering, Principle Engineer

Promoted

Feb 2024 – Present · 2 yrs 4 mos

Sr. Staff Application Engineer

Aug 2019 – Feb 2024 · 4 yrs 6 mos

Staff CAE

Jan 2016 – Aug 2019 · 3 yrs 7 mos

Low Power Multi-Voltage Synthesis - UPF

Low Power ImplementationUPF

Sr. CAE

Dec 2011 – Jan 2016 · 4 yrs 1 mo

Low Power Multi-Voltage Synthesis - UPF
High Level Synthesis - C/C++

High Level SynthesisC/C++

Nec technologies india ltd.

3 roles

Sr. Technical Specialist

Promoted

Jul 2011 – Nov 2011 · 4 mos

Technical Specialist

Jul 2010 – Jun 2011 · 11 mos

Sr. Technical Lead

Jun 2006 – Jun 2010 · 4 yrs

St microelectronics

Design Engineer -II

Sep 2004 – Jun 2006 · 1 yr 9 mos · Noida Area, India

Hcl technologies

MTS

Sep 2002 – Sep 2004 · 2 yrs · Noida Area, India

Neo electronics

Design Engineer

Dec 2001 – Sep 2002 · 9 mos · Ahmedabad Area, India

Education

Calorex Institute of Technology

Specialization — ASIC/VLSI Digital Chip Design

Jan 2000 – Jan 2000

Sardar Patel University

Master of Electronics — Electronics

Jan 1998 – Jan 2000

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