H

Himanshu Tiwari

Software Engineer

Bengaluru, Karnataka, India7 yrs 7 mos experience

Key Highlights

  • Expert in Layout Design and VLSI.
  • Strong background in Memory Compiler development.
  • Proven track record in the semiconductors industry.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Layout Design and Memory Compiler technologies.

Contact

LinkedIn

Skills

Other Skills

Design for ManufacturingCoustom MemoryLayout Versus Schematic (LVS)Design Rule Checking (DRC)EMIRSRAMDesign Engineeringmemory circuitSchematicIC LayoutCMOSElectronic Engineering

About

Experienced Layout Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Cadence Virtuoso, Very-Large-Scale Integration (VLSI), Design Engineering, Compilers, and Layout Design. Strong engineering professional with a Bachelor of Technology - BTech focused in Electronics and Communications Engineering from Chatrapati Sahuji Maharaj Kanpur University, Kanpur.

Experience

7 yrs 7 mos
Total Experience
--
Average Tenure
--
Current Experience

Synopsys inc

3 roles

Layout Design, Staff Engineer

Dec 2023 – Present · 2 yrs 6 mos

Senior A&MS Layout Design Engineer I

Promoted

Dec 2021 – Nov 2023 · 1 yr 11 mos

A&MS Layout Design Engineer

Feb 2020 – Nov 2021 · 1 yr 9 mos

  • Memory Compiler

Invecas

3 roles

Senior Memory Layout Design Engineer

Jan 2020 – Feb 2020 · 1 mo · Bengaluru Area, India

  • Memory Compiler

Senior Memory Layout Design Engineer

Jul 2018 – Dec 2019 · 1 yr 5 mos · Bengaluru Area, India

  • Memory Compiler

Memory Layout Design Engineer

Dec 2016 – Jun 2018 · 1 yr 6 mos · Bengaluru Area, India

  • Memory Compiler

Realsilicon

Memory Layout Design Engineer

Jul 2015 – Dec 2016 · 1 yr 5 mos · Bangalore

  • Custom Memory layout

Education

Chatrapati Sahuji Maharaj Kanpur University, Kanpur

Bachelor of Technology - B.Tech — Electronics and Communications Engineering

Jan 2011 – Jan 2015

CHITRA DEGREE COLLEGE, NAUBASTA,

Jan 2007 – Jan 2010

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