Jefery Derek

Software Engineer

Bengaluru, Karnataka, India6 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in Universal Verification Methodology (UVM) and Functional Verification.
  • Extensive experience in semiconductor industry and ASIC design.
  • Proficient in multiple hardware description languages.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC and VLSI design.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)Functional Verification

Other Skills

SystemVerilogC (Programming Language)VHDLApplication-Specific Integrated Circuits (ASIC)Computer HardwareSemiconductor IndustryVerilogSystem on a Chip (SoC)LinuxHardwareSystem VerificationPerlEngineeringSemiconductorsAnalog Circuits

Experience

6 yrs 11 mos
Total Experience
4 yrs 11 mos
Average Tenure
2 yrs
Current Experience

Qualcomm

Senior Engineer

Jun 2024 – Present · 2 yrs · Bengaluru, Karnataka, India · On-site

Universal Verification Methodology (UVM)SystemVerilogFunctional VerificationC (Programming Language)VHDLApplication-Specific Integrated Circuits (ASIC)+12

Samsung semiconductor india

2 roles

Associate Staff Engineer

Mar 2023 – Jun 2024 · 1 yr 3 mos

Senior design verification Engineer

Jul 2019 – Mar 2023 · 3 yrs 8 mos

Universal Verification Methodology (UVM)Linux

Education

College of Engineering, Guindy

Bachelor of Engineering - BE

Jan 2015 – Jan 2019

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