Riddhi Luthra — CEO
I am currently working as a CPU Micro-architect at Qualcomm-Nuvia. I do RTL Design for the Last Level Cache for next-Gen Snapdragon CPUs. Prior to this, I did my Masters from University of Michigan, Ann Arbor in Electrical and Computer Engineering (with focus on Computer Architecture and VLSI). At Grad School, I pursued my interests in the domains of Computer Architecture, Microarchitecture, CPUs, Multi-core Architecture, GPUs, Hardware Accelerator Design for AI/ML and Signal Processing Applications. During Summer 2022, I did my internship with Platform Architecture Systems Team at Apple where I did RTL Design and IP integration for an FPGA based Hardware Accelerator. Prior to grad school, I have worked as a Research Engineer in Optical Access Networks (Hardware Design) Team at Centre for Development of Telematics, New Delhi. My background and work experience is in System Architecture, RTL Design, Embedded System Designing and Digital System Designing using FPGAs. My skills include Verilog based RTL Design, Verification using System Verilog, FPGA Design, Microcontroller based System design, High Speed PCB Design including Schematic and Layout Design. Interested in computer architecture, CPU, GPU, hardware accelerator designs, reconfigurable architectures! Willing to learn a lot more, share what I already know, and to make a difference.
Stackforce AI infers this person is a Hardware Design Engineer specializing in CPU and FPGA technologies.
Location: Santa Clara, California, United States
Experience: 10 yrs 1 mo
Skills
- Cpu Design
- Rtl Design
- Fpga Design
- Hardware Accelerator Design
- System Architecture
- Hardware Design
- Embedded Systems
- System Design
Career Highlights
- Expert in CPU micro-architecture and RTL design.
- Hands-on experience with FPGA-based hardware accelerators.
- Strong foundation in computer architecture and VLSI.
Work Experience
Qualcomm
Staff CPU Engineer (4 mos)
Senior CPU Engineer (2 yrs 10 mos)
Apple
Platform Architecture Intern (3 mos)
University of Michigan
Graduate Student (1 yr 5 mos)
Centre for Development of Telematics (C-DOT)
Research Engineer (2 yrs 11 mos)
Centre for Electronics Design and Technology
Maker (2 yrs 7 mos)
Education
Master of Science - MS at University of Michigan
Bachelor of Engineering - BE at Netaji Subhas Institute of Technology
Senior Secondary School at Convent of Jesus And Mary, New Delhi