Abhav S Velidi

Software Engineer

Bengaluru, Karnataka, India1 yr 8 mos experience

Key Highlights

  • Expert in RISC V Processor Design and Verification.
  • Proficient in System Verilog and UVM methodologies.
  • Strong background in VLSI Design and Hardware Emulation.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and Processor Verification.

Contact

Skills

Core Skills

System Verilog AssertionsVerificationRtl DesignProcessor Design

Other Skills

Shell ScriptingRISCVMulti Chip packageSimulation ValidationHardware EmulationSynopsys zebuVerilogUniversal Verification Methodology (UVM)Application-Specific Integrated Circuits (ASIC)Very-Large-Scale Integration (VLSI)Logic DesignXilinx VivadoXilinx SDKIntel Quartus PrimeHigh performance computer architecture

Experience

1 yr 8 mos
Total Experience
1 yr 8 mos
Average Tenure
1 yr 8 mos
Current Experience

Intel corporation

SoC Design Verification Engineer

Aug 2024Present · 1 yr 8 mos · Bengaluru · Hybrid

System Verilog AssertionsShell ScriptingVerification

Bosch

Digital Design Intern

Aug 2023Jun 2024 · 10 mos · Bengaluru, Karnataka, India

  • RISC V Processor Design and Verification (UVM SV) of RV32I, M-Extension, F-Extension and Zicsr Extension. AXI V1.0 slave write implementation.
RTL DesignRISCVProcessor Design

Indian institute of technology, hyderabad

Student Intern

Aug 2021Sep 2021 · 1 mo

Education

National Institute of Technology Karnataka

Master of Technology - MTech — VLSI Design dept of Electronics and Communication Engineering

Aug 2022Jun 2024

Sir M Visvesvaraya Institute Of Technology

Bachelor of Engineering - BE — Electrical and Electronics Engineering

Jan 2018Jan 2022

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