Ashwin Ramamurthy

Software Engineer

Bengaluru, Karnataka, India9 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in Synthesis and Power Analysis methodologies.
  • Proven track record in Semiconductor industry.
  • Strong background in Electronics and Communication.
Stackforce AI infers this person is a Semiconductor industry expert with strong capabilities in Synthesis and Power Analysis.

Contact

Skills

Core Skills

SynthesisApplication EngineeringPower AnalysisMethodology Development

Other Skills

Synthesis signoffNetlist deliverySynthesis methodologiesPPA optimizationLEC checksCLP checksNetlist quality validationBenchmarkingCustomer engagementPower Optimization methodologiesPower estimationP&R stagesSignoff power qualityR&D interactionGlobal team collaboration

About

I am an engineering professional with a background in Electronics and Communication and a passion in Semiconductor industry. Having a demonstrated history of working in this industry, my area of work has included Methodology development in design flow cycles from RTL to GDSII, QoR analysis, Power analysis - Estimation and Optimization techniques across Synthesis, Place & Route technologies. Interested in problem solving, open to new and impact learning, believer in effective time management and deep work.

Experience

9 yrs 8 mos
Total Experience
2 yrs 4 mos
Average Tenure
3 mos
Current Experience

Mediatek

Senior Staff Engineer

Jan 2026Present · 3 mos · Bengaluru, Karnataka, India

Cadence design systems

4 roles

Principal Application Engineer

Jul 2024Jan 2026 · 1 yr 6 mos · Bengaluru, Karnataka, India

  • As part of pre-sales Application Engineering team in Field Organization, worked on end-to-end Synthesis signoff and netlist delivery to Physical Design teams. Developed Synthesis methodologies to achieve target PPA, Feature enablements, LEC and CLP checks, Validating netlist quality at Placement stage. Benchmarking, Evaluations and Engagements with customer teams at Qualcomm
Synthesis signoffNetlist deliverySynthesis methodologiesPPA optimizationLEC checksCLP checks+5

Lead Application Engineer

Promoted

Dec 2021Jun 2024 · 2 yrs 6 mos · Bengaluru, Karnataka, India

  • As part of pre-sales Application Engineering team in Field Organization, worked on end-to-end Synthesis signoff and netlist delivery to Physical Design teams. Developed Synthesis methodologies to achieve target PPA, Feature enablements, LEC and CLP checks, Validating netlist quality at Placement stage. Benchmarking, Evaluations and Engagements with customer teams at Qualcomm
Synthesis signoffNetlist deliverySynthesis methodologiesPPA optimizationLEC checksCLP checks+5

Sr Application Engineer

Jul 2018Mar 2019 · 8 mos · Bengaluru, Karnataka, India

  • As part of pre-sales Application Engineering team in Field Organization, developed Synthesis methodologies, RTL level power estimation, Power aware Synthesis and P&R, RTL to Signoff netlist power checks. Benchmarking, Evaluations and Engagements with customer teams at Texas Instruments
Synthesis methodologiesRTL level power estimationPower aware SynthesisP&RNetlist power checksBenchmarking+3

Application Engineer

Sep 2017Jun 2018 · 9 mos · Bengaluru, Karnataka, India

  • As part of pre-sales Application Engineering team in Field Organization, developed Synthesis methodologies, RTL level power estimation, Power aware Synthesis and P&R, RTL to Signoff netlist power checks. Benchmarking, Evaluations and Engagements with customer teams at Texas Instruments
Synthesis methodologiesRTL level power estimationPower aware SynthesisP&RNetlist power checksBenchmarking+3

Synopsys inc

Applications Engineer, II

Mar 2019Dec 2021 · 2 yrs 9 mos · Bengaluru, Karnataka, India

  • As part of Product Engineering team, developed Power Analysis and Optimization methodologies for enabling right power estimation and accuracy through Synthesis and P&R stages to achieve best Signoff power quality. Close interaction with R&D teams to improve the existing technologies and come up with new features that would have differentiated impact on tool quality and developement. Interaction with global Product Engineering, Field Engineering and Customer teams to provide accelerated solutions for critical power related issues
Power AnalysisPower Optimization methodologiesPower estimationSynthesisP&R stagesSignoff power quality+3

Synopsys inc

2 roles

Corporate Application Engineer

Jun 2017Sep 2017 · 3 mos · Bengaluru, Karnataka, India

  • Methodology and Flow analysis for UPF based low power designs, Analysis of design checks for Lint, CDC for its impact on the design cycle
Methodology analysisFlow analysisUPF based low power designsDesign checksLint analysisCDC analysis+2

Associate Corporate Application Engineer

Jun 2016Jun 2017 · 1 yr · Bengaluru, Karnataka, India

  • Developing methodologies for VLSI ASIC flow - from RTL to GDSII - using DC and ICCII for Synthesis and P&R, QoR debug, Product, Feature Validation
Methodology developmentVLSI ASIC flowRTL to GDSIISynthesisP&RQoR debug+3

Education

RV College Of Engineering

Bachelor of Engineering - BE — Electronics and Communication Engineering

Jan 2012Jan 2016

Sri Vani Education Centre, Bangalore

Class 12 — CBSE

Jan 2012Present

S Cadambi Vidya Kendra, Bangalore

Class 10 — ICSE

Jan 2010Present

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