Piyush Srivastav — Software Engineer

Owned the verification process for USB 2.0, I2C, I3C protocol, from test plan creation to coverage analysis. • Verified USB, I2C, and I3C protocol implementations. • Developed detailed test plans for protocol-specific scenarios, ensuring thorough coverage and compliance with standards. • Developed and implemented comprehensive test plans, verification environments, test cases, and coverage metrics, ensuring alignment with POR dates and milestones. • Automated regression testing and coverage collection using System Verilog and UVM methodologies. • Wrote and integrated assertions to monitor design behavior and catch corner-case bugs. • Analyzed coverage reports to identify gaps and enhance test cases for maximum coverage. • Achieved 100% code and functional coverage, significantly reducing post-silicon bugs. • Mentored junior engineers in debugging, and coverage analysis. Owned the verification process for AXI Isolation Block, from test plan creation to coverage analysis. • Developed test plans and verification environments specifically for AXI isolation blocks. • Created and implemented UVM-based testbenches for isolating and verifying AXI protocol signals. • Employed assertion-based verification techniques to ensure signal integrity and correct isolation during power-down sequences. • Conducted extensive functional and code coverage analysis, achieving targeted coverage metrics. • Identified and debugged issues related to signal isolation, ensuring robustness and reliability of the AXI interface under various scenarios. Power Aware Verification • Working on Power Aware Verification of a RF Chip at SoC Level. • SoC/IP level understanding of Testbench and verification environment creation. • Analysed the impact of power on designs and power objects associated with the power domain. • Emulating the cells like isolation, state retention etc. during the RTL simulations to verify the power sequencing features of the design. • Simulated power ON/OFF scenarios, Voltage ramp up cycle, Multi voltage scenarios together resulting into real use case scenario. • Ran and debug the Power Aware RTL and Power Aware XPROP simulation using VCS NLP and UPF. • Wrote testcases for various power scenarios in angelscript. • Low power coverage using VCS. • Analysed the various MVSIM reports generated by VCS to instrument the RTL for Power Aware simulation. • Analysed the various assertions reported by VCS during Power Aware simulation. • Identified various bugs and debugged them

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in protocol verification and power-aware design.

Location: Bengaluru, Karnataka, India

Experience: 7 yrs 7 mos