Sri Harsha

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience
Highly Stable

Key Highlights

  • Experienced in Microarchitecture and RISC-V design.
  • Strong background in Perl automation and hardware engineering.
  • Proven track record in ASIC and RTL design.
Stackforce AI infers this person is a Hardware Engineer specializing in Microarchitecture and ASIC design.

Contact

Skills

Core Skills

Microarchitecture

Other Skills

RISC-VPerlCDCSystemVerilogVerilogApplication-Specific Integrated Circuits (ASIC)RTL CodingRTL DesignPerl AutomationLint

Experience

7 yrs 9 mos
Total Experience
5 yrs
Average Tenure
2 yrs 9 mos
Current Experience

Ibm

Staff Engineer

Sep 2023Present · 2 yrs 9 mos

MicroarchitectureRISC-V

Qualcomm

4 roles

Senior Hardware Engineer

Promoted

Nov 2021Aug 2023 · 1 yr 9 mos

MicroarchitecturePerl

Hardware Engineer

Nov 2019Nov 2021 · 2 yrs

PerlCDC

Associate Hardware Engineer

Jul 2018Oct 2019 · 1 yr 3 mos

PerlSystemVerilog

Intern

May 2017Jul 2017 · 2 mos

SystemVerilogVerilog

Education

Indian Institute of Technology, Delhi

Bachelor of Technology - BTech — Electrical engineering

Jan 2014Jan 2018

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